SCPS311 March 2026
ADVANCE INFORMATION
The length of TXE8124 SPI data word is [16 + (N*8)] bits (N is the number of data bytes to write). For a single byte write or read, 24 bits of data are sent and received MSB first. SPI data must be stable during the rising edge of SCLK where it is sampled.
The data format on the SDI pin from the controller to TXE8124 is shown in Figure 7-5.
The first and second byte are mandatory portion of the frame. The B23 bit in the SDI frame is R/W, where 1 is for a read operation and 0 is for a write operation. The B22 bit is always 0 for a point-to-point connection (non-daisy chain topology). B20 to B16 correspond to the feature register of the port. B14 to B12 are for selecting the port. The B8 bit is used for multi-port operation, and must be set to 1 only if the multi-port function is used. The bits B21 to B12 are referred to as the register pointer (or offset in the register table) for the device.
Third byte onwards, the 8-bit write data is shifted in and written to the register indicated by the register pointer. For single transfer N=1 while for a burst mode N>1. For a burst transfer, the register pointer is internally incremented and the shifted data written to the updated internal register pointer. Any bit which is not defined in the frame must be sent as 0 for future compatibility.
The data format on the SDO pin from the TXE8124 to the controller is shown in Figure 7-6.
The first and second byte are standard for any SPI bus communication operation. The B23 and B22 are set as 1 to indicate valid status. B21 to B16 are the status bit from the fault status register. The second byte is always set to 0. Third byte onwards the 8-bit read is shifted out for the register pointer shifted into the device on the SDI pin. For a burst transfer (N>1) the register pointer is internally incremented and the data shifted out.