SLUSFF6 April 2025 LMG1020-Q1
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 4-1 YBV
Package6-Ball WCSP Top View| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| GND | B1 | — | Ground |
| IN+ | C1 | I | Positive logic-level input |
| IN– | C2 | I | Negative logic-level input |
| OUTL | B2 | O | Pulldown gate drive output. Connect through an optional resistor to the target transistor’s gate |
| OUTH | A2 | O | Pullup gate drive output. Connect through a resistor to the target transistor’s gate |
| VDD | A1 | I | Input voltage supply. Decouple through a small size, low inductance capacitor to GND |