SLUSFF6 April 2025 LMG1020-Q1
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 7-6 90ns Pulse from Function Generator Yielding
15ns Pulse on the Input (cyan) and Gate (blue) After
Pulse Shortening
Figure 7-8 1.2ns Gate Pulse Yielding 1.5ns 30V Into 1Ω
Pulse (500MHz scope)
Figure 7-7 90ns Pulse from Function Generator Yielding
1.5ns Pulse on the Input (ycan) and Gate (blue)
After Pulse Shortening
Figure 7-9 VDS for 1.5ns
Pulse with 40V of Bus VoltageFigure 7-6 and Figure 7-7 are the waveforms showing the pulse short pulse generation and input/output pulses. The 90ns long pulse (in green color) and its delayed signal are sent through an NAND gate, which outputs a short pulse signal as the input of LMG1020-Q1. The output signal (in blue color) follows the input (in cyan color) with certain propagation delay. An output pulse short as 1.5ns can be obtained as Figure 7-7.
Figure 7-8 is taken with a 500MHz oscilloscope and shows typical operation waveforms, including the input logic gating signal (cyan), gate signal (blue), and drain to source signal (pink) of the switching GaN FET. On the drain waveform of the FET, it is possible to see a 20V overshoot. This is due to the inductance in the power loop. Vg seems to be oscillating, but this is caused by pickup noise, which is inevitable even when using a spring ground connection.
Figure 7-9 shows the waveform of drain to source voltage of a FET driven by LMG1020-Q1 with 1.5ns pulse width and 300ps fall time, which drives maximum 60A current at 40V bus voltage.