The TLV841EVM comes populated with
TL841SADL01YBHR device variant which has an open-drain, active-low output
topology for the RESET pin. The other device variants provide
different output topolgies and can be used on this EVM. Note: if using a TLV841
device variant with push-pull output topology, the pull-up resistor must be
disconnected by leaving jumper J1 open. The TLV841EVM provides an option to apply a
separate pull-up voltage by leaving jumper J1 open and connecting the pull-up
voltage to pin 2 [VPU] of jumper J1. The TLV841EVM provides jumper J3 and
test point TP2 that is connected directly to the RESET pin for
monitoring and/or interfacing to other devices.
The reset
signal will be asserted low when:
The voltage on the SENSE pin
falls below VIT- for the TLV841S version. See Figure 4-2
The MR
pin is pulled low or when the voltage on the VDD pin falls below
VIT- for the TLV841M version
The voltage on the VDD pin
falls below VIT- for the TLV841C version.
For TLV841M and TLV841C
device variant option, the propagation detect delay tP_HL when
VDD goes below VIT-.
For TLV841M (MR pin > VOH) and TLV841C, when
the voltage on VDD or when TLV841S SENSE pin monitoring voltage rises above
(VIT+ + VHYS), the output reset pin will de-assert and
remain de-asserted until a reset condition occurs again. Please refer to TLV841 datasheet for more information on the RESET
output and how it reacts to start up conditions and minimum values of VDD.