UCC21225A
- Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
- 5 x 5 mm, Space-Saving LGA-13 Package
- Switching Parameters:
- 19-ns Typical Propagation Delay
- 5-ns Maximum Delay Matching
- 6-ns Maximum Pulse-Width Distortion
- CMTI Greater than 100-V/ns
- 4-A Peak Source, 6-A Peak Sink Output
- TTL and CMOS Compatible Inputs
- 3-V to 18-V Input VCCI Range
- Up to 25-V VDD with 5-V UVLO
- Programmable Overlap and Dead Time
- Rejects Input Transients Shorter than 5-ns
- Fast Disable for Power Sequencing
- Safety-Related Certifications:
- 3535-VPK Isolation per DIN V VDE V 0884-11:2017-01
- 2500-VRMS Isolation for 1 Minute per UL 1577
- CQC per GB4943.1-2011 (Planned)
The UCC21225A is an isolated dual-channel gate driver with 4-A source and 6-A sink peak current in a 5-mm x 5-mm LGA-13 package. It is designed to drive power transistors up to 5-MHz with best-in-class propagation delay and pulse-width distortion.
The input side is isolated from the two output drivers by a 2.5-kVRMS isolation barrier, with 100-V/ns minimum common-mode transient immunity (CMTI). Internal functional isolation between the two secondary side drivers allows working voltage up to 700-VDC.
This driver can be configured as two low-side, two high-side, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded.
The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to 18-V makes the driver suitable for interfacing with both analog and digital controllers. All the supply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21225A enables high power density, high efficiency, and robustness in a wide variety of power applications.
技術(shù)文檔
| 頂層文檔 | 類型 | 標(biāo)題 | 格式選項(xiàng) | 下載最新的英語(yǔ)版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | UCC21225A 4-A, 6-A, 2.5-kVRMS Isolated Dual-Channel Gate Driver in LGA 數(shù)據(jù)表 (Rev. A) | PDF | HTML | 2018年 2月 7日 | ||
| 證書 | VDE Certificate for Basic Isolation for DIN EN IEC 60747-17 (Rev. Y) | 2025年 8月 20日 | ||||
| 應(yīng)用手冊(cè) | 驅(qū)動(dòng)芯片在應(yīng)用中的常見問題分析與解決 | 2023年 1月 13日 | ||||
| 應(yīng)用簡(jiǎn)報(bào) | 了解峰值源電流和灌電流 (Rev. A) | 英語(yǔ)版 (Rev.A) | 2020年 4月 29日 | |||
| 應(yīng)用簡(jiǎn)報(bào) | 適用于柵極驅(qū)動(dòng)器的外部柵極電阻器設(shè)計(jì)指南 (Rev. A) | 英語(yǔ)版 (Rev.A) | 2020年 4月 29日 | |||
| 應(yīng)用簡(jiǎn)報(bào) | How to Drive High Voltage GaN FETs with UCC21220A | 2019年 3月 6日 | ||||
| 證書 | UL Certification E181974 Vol 4. Sec 8 (Rev. A) | 2018年 7月 23日 | ||||
| 證書 | CQC Product Certificate 2 | 2018年 2月 7日 |
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| 封裝 | 引腳 | CAD 符號(hào)、封裝和 3D 模型 |
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訂購(gòu)和質(zhì)量
- RoHS
- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
- MSL 等級(jí)/回流焊峰值溫度
- MTBF/時(shí)基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)
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