SN65LVDM180

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全雙工 LVDM 收發(fā)器

產品詳情

Function Transceiver Protocols LVDM, LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols LVDM, LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 100 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm2 8.65 x 6 TSSOP (PW) 14 32 mm2 5 x 6.4
  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Typical Full-Duplex Signaling Rates of 100 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input
    Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typical
    • Receiver: 3.7 ns Typical
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5-V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Failsafe

  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Typical Full-Duplex Signaling Rates of 100 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input
    Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typical
    • Receiver: 3.7 ns Typical
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5-V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Failsafe

The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve high signaling rates. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point half duplex, baseband data transmission over a controlled impedance media of approximately 100 characteristic impedance.

The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application-specific characteristics.

The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are characterized for operation from –40°C to 85°C.

The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve high signaling rates. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point half duplex, baseband data transmission over a controlled impedance media of approximately 100 characteristic impedance.

The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application-specific characteristics.

The SN65LVDM179, SN65LVDM180, SN65LVDM050, and SN65LVDM051 are characterized for operation from –40°C to 85°C.

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頂層文檔 類型 標題 格式選項 下載最新的英語版本 日期
* 數據表 High-Speed Differential Line Drivers And Receivers 數據表 (Rev. J) 2009年 7月 17日
應用手冊 AN-1926:M-LVDS 簡介及其時鐘和數據分配應用 (Rev. C) PDF | HTML 英語版 (Rev.C) PDF | HTML 2023年 7月 5日
應用簡報 How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
應用手冊 SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

設計與開發(fā)

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仿真模型

SN65LVDM180 IBIS Model

SLLM013.ZIP (50 KB) - IBIS Model
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用戶指南: PDF
英語版 (Rev.A): PDF
封裝 引腳 CAD 符號、封裝和 3D 模型
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian

訂購和質量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點
  • 封裝廠地點

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