SN65LVDM176
- Low-Voltage Differential Driver and Receiver for Half-Duplex Operation
- Designed for Signaling Rates of 400 Mbit/s
- ESD Protection Exceeds 15 kV on Bus Pins
- Operates From a Single 3.3-V Supply
- Low-Voltage Differential Signaling With Typical Output Voltages of 350 mV and a 50-
Load - Valid Output With as Little as 50 mV Input Voltage Difference
- Propagation Delay Times
- Driver: 1.7 ns Typ
- Receiver: 3.7 ns Typ
- Power Dissipation at 200 MHz
- Driver: 50 mW Typical
- Receiver: 60 mW Typical
- LVTTL Levels Are 5-V Tolerant
- Bus Pins Are High Impedance When Disabled or With VCC Less Than 1.5 V
- Open-Circuit Fail-Safe Receiver
- Surface-Mount Packaging
- D Package (SOIC)
- DGK Package (MSOP)
PowerPAD is a trademark of Texas Instruments.
The SN65LVDM176 is a differential line driver and receiver configured as a transceiver that uses low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbit/s. These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of less than 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.
The intended application of this device and signaling technique is for half-duplex or multiplex baseband data transmission over controlled impedance media of approximately 100- characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables. (Note: The ultimate rate and
distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics).
The SN65LVDM176 is characterized for operation from \x9640°C to 85°C.
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技術(shù)文檔
| 頂層文檔 | 類型 | 標(biāo)題 | 格式選項(xiàng) | 下載最新的英語版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | High-Speed Differential Line Transceiver 數(shù)據(jù)表 (Rev. D) | 2000年 8月 3日 | |||
| 應(yīng)用手冊(cè) | AN-1926：M-LVDS 簡(jiǎn)介及其時(shí)鐘和數(shù)據(jù)分配應(yīng)用 (Rev. C) | PDF | HTML | 英語版 (Rev.C) | PDF | HTML | 2023年 7月 5日 | |
| 應(yīng)用簡(jiǎn)報(bào) | How Far, How Fast Can You Operate MLVDS? | 2018年 8月 6日 | ||||
| 應(yīng)用手冊(cè) | Transmission at 200 Mbps in VME Card Cage Using LVDM (Rev. A) | 2002年 1月 4日 | ||||
| 應(yīng)用手冊(cè) | SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) | 2001年 11月 20日 |
設(shè)計(jì)與開發(fā)
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| 封裝 | 引腳 | CAD 符號(hào)、封裝和 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| VSSOP (DGK) | 8 | Ultra Librarian |
訂購和質(zhì)量
- RoHS
- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
- MSL 等級(jí)/回流焊峰值溫度
- MTBF/時(shí)基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)
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