主頁 接口 LVDS、M-LVDS 和 PECL IC

SN65LVDM051-Q1

正在供貨

汽車類高速差動線路驅(qū)動器和接收器

產(chǎn)品詳情

Function Transceiver Protocols LVDM, LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 500 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Automotive Operating temperature range (°C) -40 to 125
Function Transceiver Protocols LVDM, LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 500 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Automotive Operating temperature range (°C) -40 to 125
SOIC (D) 16 59.4 mm2 9.9 x 6
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Signaling Rates up to 500 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3 V Supply
  • Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typ
    • Receiver: 3.7 ns Typ
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5 V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Signaling Rates up to 500 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3 V Supply
  • Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typ
    • Receiver: 3.7 ns Typ
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5 V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe

The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point and multipoint, baseband data transmission over a controlled impedance media of approximately 100 of characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.

The SN65LVDM050Q and SN65LVDM051Q are characterized for operation from –40°C to 125°C. Additionally, Q1 suffixed parts are qualified in accordance with AEC-Q100 stress test qualification for integrated circuits.

The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point and multipoint, baseband data transmission over a controlled impedance media of approximately 100 of characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.

The SN65LVDM050Q and SN65LVDM051Q are characterized for operation from –40°C to 125°C. Additionally, Q1 suffixed parts are qualified in accordance with AEC-Q100 stress test qualification for integrated circuits.
下載 觀看帶字幕的視頻 視頻

您可能感興趣的相似產(chǎn)品

功能與比較器件相似
SN65LVDM051 正在供貨 雙路 LVDS 變送器和接收器 Catalog rated variant, lower signlaing rate (100Mbps)

技術文檔

star =有關此產(chǎn)品的 TI 精選熱門文檔
未找到結(jié)果。請清除搜索并重試。
查看全部 4
頂層文檔 類型 標題 格式選項 下載最新的英語版本 日期
* 數(shù)據(jù)表 High-Speed Differential Line Drivers And Receivers 數(shù)據(jù)表 (Rev. A) 2008年 4月 30日
應用手冊 AN-1926：M-LVDS 簡介及其時鐘和數(shù)據(jù)分配應用 (Rev. C) PDF | HTML 英語版 (Rev.C) PDF | HTML 2023年 7月 5日
應用簡報 How Far, How Fast Can You Operate MLVDS? 2018年 8月 6日
應用手冊 SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 2001年 11月 20日

設計與開發(fā)

如需其他信息或資源，請點擊以下任一標題進入詳情頁面查看（如有）。

仿真模型

SN65LVDM051 IBIS Model

SLLM010.ZIP (51 KB) - IBIS Model
下載
模擬工具

PSPICE-FOR-TI — PSpice? for TI 設計和仿真工具

PSpice? for TI 可提供幫助評估模擬電路功能的設計和仿真環(huán)境。此功能齊全的設計和仿真套件使用 Cadence? 的模擬分析引擎。PSpice for TI 可免費使用，包括業(yè)內(nèi)超大的模型庫之一，涵蓋我們的模擬和電源產(chǎn)品系列以及精選的模擬行為模型。

借助?PSpice for TI 的設計和仿真環(huán)境及其內(nèi)置的模型庫，您可對復雜的混合信號設計進行仿真。創(chuàng)建完整的終端設備設計和原型解決方案，然后再進行布局和制造，可縮短產(chǎn)品上市時間并降低開發(fā)成本。?

在?PSpice for TI 設計和仿真工具中，您可以搜索 TI (...)
發(fā)送申請
模擬工具

TINA-TI — 基于 SPICE 的模擬仿真程序

TINA-TI 提供了 SPICE 所有的傳統(tǒng)直流、瞬態(tài)和頻域分析以及更多。TINA 具有廣泛的后處理功能，允許您按照希望的方式設置結(jié)果的格式。虛擬儀器允許您選擇輸入波形、探針電路節(jié)點電壓和波形。TINA 的原理圖捕獲非常直觀 - 真正的“快速入門”。

TINA-TI 安裝需要大約 500MB。直接安裝，如果想卸載也很容易。我們相信您肯定會愛不釋手。

TINA 是德州儀器 (TI) 專有的 DesignSoft 產(chǎn)品。該免費版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需獲取可用 TINA-TI 模型的完整列表，請參閱：SpiceRack - 完整列表 

需要 HSpice (...)

用戶指南: PDF
英語版 (Rev.A): PDF
View Options
封裝 引腳 CAD 符號、封裝和 3D 模型
SOIC (D) 16 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

推薦產(chǎn)品可能包含與 TI 此產(chǎn)品相關的參數(shù)、評估模塊或參考設計。

支持和培訓

視頻